Scroll Down

ગતિ શક્તિ વિશ્વવિદ્યાલય

गति शक्ति विश्वविद्यालय

GATI SHAKTI VISHWAVIDYALAYA

(A Central University under the Ministry of Railways, Government of India)

Faculty Profile

Dr. Sagar

Dr. Sagar

Assistant Professor
PhD, IIT Dhanbad
Areas of Expertise:

Advanced Communication Systems, Investigations on the Performance of the Generalized Quadrature Spatial Modulation Techniques

Google Scholar Profile

Education
  • PhD (Analog, Mixed-Signal and Low Power VLSI Design), IIT Dhanbad.
  • M.Tech (Electronics Engineering), UVCE-Government Engineering College, Bangalore.
Experience
  • December 2024 - present,  Assistant Professor, Gati Shakti Vishwavidyalaya, Vadodara.
  • May 2024 - November 2024,  Assistant Professor, Vellore Institute of Technology (VIT), Vellore.
  • September 2023 - April 2024, Assistant Professor, ICFAI- Foundation for Higher Education, Hyderabad.    
Teaching

Academic Year: 2024 - 2025

  • VLSI Design Fabrication and Testing
  • Data Structure and Algorithms
  • Embedded Systems Lab

Academic Year: 2025 - 2026

  • Internet of Things (IoT)
  • Introduction to Electrical and Electronics Engineering  
  • Introduction to Electrical and Electronics Engineering Lab


Journal Publications
  1. Niranjan Raj, Anshul Awasthi, Sagar, Parvatam Deepthi, Surya Shankar Dan, “Emulation of versatile tunable universal mem-elements design and its application” In AEU-International Journal of Electronics and Communications, Elsevier., vol. 197, pp. 155838, May 2025.
  2. Sagar, Somenath Dutta, Chandan Kumar Choubey, R. K Ranjan, “Tunable floating and grounded memristor emulator model” In International Journal of Electronics., Taylor & Francis, vol. 112(1), pp. 1-18, Jan. 2025.
  3. Sagar, Manoj Joshi, R. K Ranjan, Sung-Mo Kang, “A compact memristor emulator for novel IC applications: Its design and experimental validation” In Chaos, Solitons & Fractals., Elsevier, vol. 183, pp. 114824, June 2024.
  4. Sagar, R. K Ranjan, and Sung-Mo Kang, “Resistorless: Floating and Grounded Memristor model with Electronic Tunability” In IEEE Transactions on Circuits and Systems II: Ex. Brf., vol. 70 (7), pp. 2040-2044, July 2023.
  5. PK Sharma, Sagar, Rajeev Kumar Ranjan, et. Al., “Resistive tunable memristor emulator model and its application” In AEU-International Journal of Electronics and Communications, Elsevier., vol. 160, pp. 154500, Jan. 2023.
  6. Sagar, Rajeev Kumar Ranjan, et. al., “A Compact Floating and Grounded Memristor model using Single Active Element” In AEU-International Journal of Electronics and Communications, Elsevier., vol. 157, pp. 154426, Dec. 2022.
  7. Sagar, Vijay Kumar Verma, and Rajeev Kumar Ranjan, “Electronically Tunable Flux-Controlled Resistorless Memristor Emulator,” In IEEE Canadian Journal of Electrical and Computer Engineering, vol. 45 (3), pp. 311-317, Aug. 2022.
  8. Sagar, Prashant Kumar, Rajeev Kumar Ranjan, “Resistorless memristor emulator using CFTA and its experimental verification,” In IEEE Access, vol. 9, pp. 64065-64075, June 2021.
  9. Rajeev Kumar Ranjan, Sagar, Fabian Khateb et. al., “High‐frequency floating memristor emulator and its experimental results,” In IET Circuits, Devices & Systems, vol. 13(3), pp. 292-302, May 2019.
  10. Prakhar Shrivastava, Sagar, Rajeev Kumar Ranjan, et. al., “PI, PD and PID controllers using single DVCCTA,” In Iranian Journal of Science and Technology, Springer, vol. 43, pp. 673-685, Nov. 2019.
Patents
  1. Dr. Rohit Mathur, Dr. Sagar. 2024. High Gain Antenna For Lorawan. Indian Design Patent, Design no. 423744-001, Awarded July 19, 2024.

Conference Publications
  1. Niranjan Raj, Sagar; Parvatam Deepthi, “Emulation of Novel and Electronically Tunable Universal Mem-Elements Design,” IEEE 21th International Conference on Electrical Engineering/Electronics (ECTI-CON-21), Khon Kaen, Thailand, July 2024.

  2. Sagar, N. Raj, P. K. Sharma. R. K. Ranjan, “Grounded Memristor Emulator Using Single Active Block,” IEEE 19th International Conference on Electrical Engineering/Electronics (ECTI-CON-19), Prachuap Khiri Khan, Thailand, June 2022.

  3. Sagar Surendra Prasad, S. Tasneem, B. Priyadarshini, R. K. Ranjan, “Electronic Tunable Bi-Quad Filter Using MO-CCCDTA,” IEEE 4th International Conference on Electrical, Computer and Communication Technologies (ICECCT), Erode, India, Nov. 2021.

Awards and Honours

1. Awarded Honourable Mention Award in circuit track for the article presented in the Micro and Nanoelectronics Circuit track at MNCDS-2024, NIT Silchar, Assam. Jan. 2024.

2. Achieved 2nd position in the international quiz competition, organized by OPTICA (OSA) and SPIE IIT (ISM), Dhanbad on International Light Day, May 16th 2022.

3. Meta-Reviewer in VDTA-28 organized by VIT Vellore for track-2, VLSI Circuit and System Design.

4. Reviewer in IEEE transactions on circuits and systems, AEU, Microelectronics Elsevier, AJSE- Springer, and Electronics Letter, Wiley.